Index of /h96max/pn63/Downloads-1/IP and CA/IP Disclosure

[ICO]NameLast modifiedSizeDescription
[PARENTDIR]Parent Directory  -  
[DIR]3D Disclosures/2025-07-03 10:36 -  
[ ]4 layers Memory Stack with Circuit under Tile.ppt2009-09-08 04:22 156K 
[ ]2231 Assignment.doc2009-12-15 01:54 66K 
[ ]2231 Declaration.doc2009-12-15 01:51 86K 
[ ]2233 Assignment.doc2009-12-18 05:22 49K 
[ ]2233 Declaration.doc2009-12-18 05:23 102K 
[ ]3224-P85783 claims.docx2015-08-15 20:23 40K 
[ ]8909849.pdf2014-12-31 02:46 91K 
[ ]10262220-01.doc2003-04-08 11:36 77K 
[ ]10293035-01.doc2003-05-06 07:50 99K 
[ ]AB0297-US Assignment.pdf2019-02-22 03:10 151K 
[ ]AB0297-US_App_Final.pdf2019-02-22 03:01 231K 
[ ]AB0297-US_DEC_KAU.pdf2019-02-22 03:07 167K 
[ ]AB0297-US_Figs_Final.pdf2019-02-22 03:01 95K 
[ ]AB0297 DecANDAssign Balaji Ashir.pdf2019-02-22 03:13 2.7M 
[ ]Addtional material for Tim to illustrate using MOSFET as variable loadline.ppt2007-04-20 14:33 377K 
[ ]Copy of Copy of SXP Disclosures for July 2017 MG MH KP DK.xlsx2017-07-19 04:48 14K 
[ ]Declaration of SELF-ALIGNED CROSS-POINT PHASE CHANGE MEMORY-SWITCH ARRAY.pdf2016-12-14 12:25 0  
[ ]Drift - READ.doc2010-05-02 03:13 21K 
[ ]Dual alignment Summary A.ppt2004-05-12 08:50 725K 
[ ]Electrode for Phase Change Memory.docx2011-05-04 02:39 41K 
[ ]I08273-CN 10007 Assignment.DOC2010-02-13 00:38 40K 
[ ]IDF-80667.doc2010-05-09 07:22 148K 
[ ]IDF-80682.doc2010-05-05 14:12 166K 
[ ]IDF-80683.doc2010-05-06 15:57 70K 
[ ]IDF-84827.xps2011-04-06 12:30 1.0M 
[ ]IDF 80535.pdf2010-05-06 02:28 203K 
[ ]IDF 80667.pdf2010-05-19 08:34 326K 
[ ]IDF 80667.xps2010-05-09 07:33 431K 
[ ]IDF 80667 graph for Dermot.pptx2010-09-23 05:44 581K 
[ ]IDF 80682.pdf2010-05-06 02:28 288K 
[ ]IDF 84837.pdf2011-04-06 12:35 698K 
[ ]IN Invention Disclosure --- OTS-Transistor Logic (OTL) and Analog Switch.doc2009-06-26 14:48 83K 
[ ]INTEL INVENTION DISCLOSURE --- Contact to Gate.doc2002-12-05 13:14 157K 
[ ]INTEL INVENTION DISCLOSURE --- Varactor.doc2003-01-27 01:04 156K 
[ ]IP generator Q2-2019.xlsx2019-06-22 08:22 9.4K 
[ ]ISO Invention Disclosure --- Damascene Compatible Self-Aligned Top Electrode for Phase Change Memory.doc2007-05-02 06:17 211K 
[ ]ISO Invention Disclosure --- Four Vertically Stack Layers of OUMS Memory Array.doc2007-05-01 12:57 415K 
[ ]ISO Invention Disclosure --- Highly Effective Reading of Resistive Memory Array.doc2007-02-01 15:19 124K 
[ ]ISO Invention Disclosure --- METHOD READING MULTI-LEVEL OUM MEMORY.doc2008-09-09 13:43 69K 
[ ]ISO Invention Disclosure --- MOS-OUMS Array.doc2007-01-28 06:50 284K 
[ ]ISO Invention Disclosure --- Method to Reduce Write Current and Improve Cycling Endurance of Phase Change Memory.doc2007-05-02 02:49 172K 
[ ]ISO Invention Disclosure --- Method to SET OUM in OUMS.doc2009-06-26 09:29 141K 
[ ]ISO Invention Disclosure --- Nano Pillar Phase Change Memory.doc2007-07-08 07:23 199K 
[ ]ISO Invention Disclosure --- Nano Trench Phase Change Memory.doc2007-07-06 15:14 175K 
[ ]ISO Invention Disclosure --- OTS Anti Fuse for PROM.DOC2007-05-02 02:45 606K 
[ ]ISO Invention Disclosure --- OUMS High Margin Read Method.doc2007-01-28 07:48 114K 
[ ]ISO Invention Disclosure --- OUMTh.doc2009-07-01 04:59 152K 
[ ]ISO Invention Disclosure --- Operation of a MOS-OTS RAM cell, rev2.doc2008-07-14 03:15 129K 
[ ]ISO Invention Disclosure --- Self-Aligned OUMS Cross Point Memory Array Architecture.doc2007-04-30 15:12 190K 
[ ]ISO Invention Disclosure --- WRITE method for Phase Change Memory.doc2008-07-24 07:03 231K 
[ ]ISO Invention Disclosure --- nano-cross-point PCM.doc2007-04-30 01:49 151K 
[ ]ISO_Disclosure.doc2008-03-08 00:22 70K 
[ ]Intel-Numonyx Invention Disclosure template rev1.doc2009-05-09 03:20 79K 
[ ]Inventor Checklist.doc2019-02-22 03:01 53K 
[ ]JDP PCMS US granted and published.xlsx2012-01-21 02:53 10K 
[ ]Low Capacitance Input ESD Protection.docx2011-05-07 02:06 210K 
[ ]Low Energy SET.xls2009-06-26 03:15 480K 
[ ]Memory access in a cross point array.doc2011-04-07 07:02 676K 
[ ]Method for Program-Verify of PCMS.docx2011-07-04 03:36 207K 
[ ]NMOST-OTS 1T1M for File Register and Volitle Memory Array.xls2008-07-12 16:50 30K 
[ ]Negative Divider using TW NMOS.doc2004-01-07 06:29 134K 
[ ]OTS OTP.ppt2010-05-30 08:06 115K 
[ ]OTS SRAM.ppt2009-12-05 04:04 83K 
[ ]OTS for HF ESD.xls2011-05-05 08:51 11M 
[ ]OUMS for ESD.vsd2007-04-26 15:59 93K 
[ ]On-Chip Heat Sink (conflicting version 1 created on DKAU-MOBL3-635757).pptx2015-02-18 12:28 46K 
[ ]On-Chip Heat Sink (conflicting version 2 created on DKAU-MOBL6).pptx2015-08-19 15:01 62K 
[ ]On-Chip Heat Sink.docx2015-02-18 10:07 236K 
[ ]On-Chip Heat Sink.pptx2015-02-18 12:28 46K 
[ ]On-Chip Heat Sink2.pptx2015-08-19 14:58 51K 
[ ]OnChipHeatSink.docx2015-08-15 20:36 74K 
[ ]P31450-Intel76105.xps2011-07-21 05:47 494K 
[ ]P32710-Intel76136.xps2011-07-21 05:47 636K 
[ ]P32710_JDP_Intel-Numonyx_Assignment.pdf2009-12-22 16:53 203K 
[ ]P32710_Oath_or_Dec.pdf2009-12-22 16:48 209K 
[ ]P97588 Assignment.pdf2016-06-28 00:38 142K 
[ ]P97588 Declaration - Derchang Kau.pdf2016-06-28 00:51 232K 
[ ]P112825 - Figures Final.pdf2017-03-28 04:46 1.3M 
[ ]P112825 App - Final Draft 3-27-2017.docx2017-03-28 04:46 70K 
[ ]P112825_App_Filed_2017_03_30.pdf2017-04-03 22:44 191K 
[ ]P112825_Assignment.pdf2017-11-21 04:58 176K 
[ ]P112825_Dec_KAU.pdf2017-03-28 04:44 224K 
[ ]P112825_Dec_KAU_signed.pdf2017-11-21 04:59 224K 
[ ]P112825_Figs_Filed_2017_03_30.pdf2017-04-03 22:44 158K 
[ ]P149135 eNVM subsystem.docx2017-07-11 16:11 680K 
[DIR]Path-2 IP Submission/2025-07-03 10:36 -  
[ ]Read.doc2010-05-05 07:44 73K 
[DIR]Resisor Memeory Array Architecture -- OR/2025-07-03 10:36 -  
[ ]SET Inhibiting Bias.doc2010-05-03 12:55 38K 
[ ]SI Invention Disclosure --- PCM refresh.doc2008-05-23 02:56 308K 
[ ]SXP Disclosures for November 2016_MH DK.xlsx2016-11-16 05:01 13K 
[ ]Select Trigger Architecture.pptx2011-04-08 00:00 284K 
[ ]Self-Align Cross Point.ppt2007-04-30 14:50 148K 
[ ]TMGidf-Rev 29.doc2008-03-08 00:20 163K 
[ ]Verification of PCMS.doc2010-05-05 14:05 114K 
[DIR]idf 80667/2025-07-03 10:36 -  
[ ]idf80682.xps2011-05-23 13:59 421K 
[ ]intel pcm disclosure tracking.xls2007-01-27 07:40 19K 
[ ]ovonyx - patents and published applications.xlsx2012-01-21 02:53 23K 
[ ]phase change memory - patent and published - US.xlsx2012-01-21 02:53 15K 
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